发明名称 CLOCK SYNCHRONIZATION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To attain with a simple consfiguration initial synchronization of a clock signal, even for a modulation system other than orthogonal modulation. SOLUTION: A cosine sine output circuit 103 receives an integration clock ICLK, a sampling signal SSAMP, a positive/negative switching signal SPM, a cosine component integrated signal SCCI, and a sine component integrated signal SCSI, to obtain a cosine signal SCOS which corresponds to a cosine component and a sine signal SSIN corresponding to a sine component in the initial phase of a symbol clock, and an angle detector 109 receives the cosine signal SCOS and the sine signal SSIN to obtain the initial phase of the symbol clock SCLK.
申请公布号 JP2000156715(A) 申请公布日期 2000.06.06
申请号 JP19980328657 申请日期 1998.11.18
申请人 NEC CORP 发明人 SHIKAKURA GIICHI;OSAWA TOMOYOSHI
分类号 H04L27/14;H04L7/00;H04L7/027;H04L27/22 主分类号 H04L27/14
代理机构 代理人
主权项
地址