发明名称 METHOD AND APPARATUS FOR REDUCING PHASE ERROR IN REMOTE CLOCK
摘要 <P>PROBLEM TO BE SOLVED: To provide a method capable of reducing phase errors in a remote clock synchronized with a reference clock when feedback control cannot be performed temporarily. <P>SOLUTION: The method comprises an open loop controller and an operation history database. The open loop controller synchronizes a remote clock with a reference clock when communication cannot be conducted between the clocks. The operation history database collects a continuous operation history for the remote clock in a state that a closed loop controller is under feedback control. When communication between clocks is stopped, the remote clock is controlled by an approximate control voltage based on past operation history data stored in the operation history database. <P>COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009060315(A) 申请公布日期 2009.03.19
申请号 JP20070225074 申请日期 2007.08.31
申请人 NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL & TECHNOLOGY 发明人 FABRIZIO TAPPERO;IWATA TOSHIAKI
分类号 H04L7/033;G04R20/00;G04R20/04;G04R40/02;H04L7/00 主分类号 H04L7/033
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