发明名称 Test method for an integrated circuit including non-volatile memory cell capable of temporarily holding information.
摘要 <p>There are provided, in addition to an ordinary operation word line (10) for controlling a non-volatile memory upon regularly writing or reading information, an inspection word line (22), a selection transistor (24, 34), and a storage capacitor (26, 36), whereby a signal is inputted onto the inspection word line upon inspection to switch on the selection transistor and hence the information is inputted into the capacitor through a bit line (12) for writing into and reading from the capacitor. More specifically, the selection transistor and the capacitor are operatd as in a DRAM to diagnose the function of an integrated circuit chip without operation of the non-volatile memory.</p>
申请公布号 EP0412781(A1) 申请公布日期 1991.02.13
申请号 EP19900308688 申请日期 1990.08.07
申请人 KAWASAKI STEEL CORPORATION 发明人 KAWANA, KEIICHI
分类号 H01L21/82;G11C11/00;G11C16/04;H01L27/10;H03K19/177 主分类号 H01L21/82
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