发明名称 LOW PERMITTIVITY INSULATING METHOD APPLICABLE TO VLSI
摘要 <p>PURPOSE: To provide a method for producing a semiconductor device with reduced capacitance between adjacent conductors on a connecting layer. CONSTITUTION: A bridge is formed between the highest parts of conductors 12 at small intervals by directional growth forming a dielectric layer 14 by deciding a direction at an acute angle with respect to the plane of a semiconductor substrate 10 to form at least one gaseous dielectric layer 18. As this process is self aligning forming, the shadowing effect of the conductor itself is used of masking the growth of a dielectric material between the conductors and only very small intervals between the conductors are bridged. Continually, an inter-layer dielectric 20 is grown to complete a structure. A directional deposition method can be the electron beam evaporation of a material such as SiO2 , Si3 N4 , polyimide or amorphous Teflon.</p>
申请公布号 JPH0855912(A) 申请公布日期 1996.02.27
申请号 JP19950104292 申请日期 1995.04.27
申请人 TEXAS INSTR INC <TI> 发明人 CHIN CHIEN CHIYOO
分类号 H01L21/31;H01L21/768;H01L23/522;H01L23/532;(IPC1-7):H01L21/768 主分类号 H01L21/31
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