FAILSAFE MONITORING SYSTEM FOR POTENTIOMETERS

摘要

Control potentiometers are monitored by using a computer processor and a monitor interface circuit connected between the potentiometer and the processor. The potentiometer, its terminals and its wiper are monitored for faults. In addition the monitor interface circuit itself is tested so that a fault in the potentiometer or a fault in the monitor interface circuit is detected to prevent the control potentiometer and monitor interface circuit from producing an incorrect control signal. The monitoring is accomplished by measuring changes in the full potentiometer resistance from a predetermined value. The changes are compared against boundary limits to detect whether a change is inside or outside the boundary limits. A fault in the control potentiometer is indicated when a change is outside the boundary limits. The monitoring also monitors wiper resistance of the potentiometer. The wiper resistance of the control potentiometer is measured, and the wiper resistance is compared against a fault threshold to detect if the wiper resistance has passed the fault threshold. A fault in the wiper of the control potentiometer is indicated when the wiper resistance has passed the threshold. The testing of the monitor interface circuit is accomplished by measuring idle signals applied to the full potentiometer and to the wiper when the monitor interface circuit is an idle state. The idle signals are compared against an expected signal to detect if the idle signals are within a predetermined tolerance range of the expected signal. A fault in the monitor interface circuit is indicated if the idle signals are outside the predetermined tolerance range.