| 摘要 |
PROBLEM TO BE SOLVED: To provide a double-integrated delta sigma analog-digital converter capable of suppressing a reset noise to the minimum value when a non-signal state of input continues for a prescribed period of time. SOLUTION: The circuit is provided with a first subtracter J1 for subtracting input data Ei and a reference voltage (Es, -Es), a first integrator S1, a second subtracter J2 for subtracting a first integrator output 13 and the reference voltage (Es, -Es), a second integrator S2, a quantizer Q3 for converting a second integrator output 16 into a one-bit digital data yd, a delay circuit Z-1, a one-bit DAC for forming the reference voltage (Es, -Es) code-modulated by the data yd, a non-signal state detecting means DET1 for the data Ei, an average level measuring means MS for the output 13 date Ei, an average level detection means MD for detecting a coincident point between the average level output and the output 13, and a means Q4 for resetting the first and second integrators S1 and S2.
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