| 摘要 |
The present invention provides a method for forming a mask set for manufacturing an integrated circuit, comprising: a determination step of determining whether a first via layout pattern and a power rail layout pattern exist in an original layout design, wherein the first via layout pattern and the power rail layout pattern are overlapped with each other, the first via layout pattern is a part of a first cell layout of the original layout design, and the power rail layout pattern is shared by the first cell layout and a second cell layout of the original layout design; a correction step of correcting the original layout design to be a corrected layout design; and a mask set forming step of forming a mask set based on the corrected layout design. The correction step of correcting the original layout design includes a replacement step of replacing the first via layout pattern to an expanded via layout pattern if the first via layout pattern and the power rail layout pattern exist in the original layout design. |
