摘要 |
<p>PCT No. PCT/DE94/00246 Sec. 371 Date Sep. 20, 1995 Sec. 102(e) Date Sep. 20, 1995 PCT Filed Mar. 12, 1994 PCT Pub. No. WO94/22165 PCT Pub. Date Sep. 29, 1994A plasma etching process for cleaning laterally exposed p-n junctions of semiconductor elements, in particular power diodes after soldering together the semiconductor chip in question and connection elements is proposed, wherein the etching gases employed are fluorine compounds. Since the process according to the present invention does not involve doping dependence and crystal orientation dependence, it produces essentially vertically oriented chip-edges after etching and as a result a lower failure rate compared to the known wet-etching process. Since numerous rinsing processes can also be dispensed with, the plasma etching process is more suitable for mass production.</p> |