METHOD OF OPERATING SEMICONDUCTOR DEVICE

摘要

Systems, apparatuses, and methods of power management for a system on a chip (SoC) are described. In one method, the operational states of the cores/processors of the SoC are monitored and, if a core/processor is in idle or standby mode, the rate of the clock signal driving a component, such as a memory interface, associated with the idle core/processor is reduced, thereby reducing power consumption.

主权项

1. A method of operating a system on a chip (SoC), comprising:
providing a first internal (INT) clock signal with a first clock rate to each intellectual property (IP) on the SoC; examining states of a first core/processor and a second core/processor provided on the SoC; and if both the first core/processor and the second core/processor are in an idle state, changing the first INT clock signal to a second INT clock signal having a second clock rate different from the first clock rate.