发明名称 Packet synchronization switching method and gateway device
摘要 A gateway device includes plural electronic circuit boards with redundant structures, between first and second networks, which are different. The gateway device receives data provided through the first network and, after applying data processing, outputs data to the second network. Data processing reference timings and time information, which are common in the gateway device, are shared, the data processing is executed in synchronization with the reference timings, and synchronized packets are provided. System switching between the electronic circuit boards is executed in accordance with the time information. Thus, packet outputs are synchronously switched.
申请公布号 US9401878(B2) 申请公布日期 2016.07.26
申请号 US200912461609 申请日期 2009.08.18
申请人 Oki Electric Industry Co., Ltd. 发明人 Masuya Yuzuru
分类号 H04L12/56;H04J3/06;H04L12/939;H04L12/931 主分类号 H04L12/56
代理机构 Rabin & Berdo, P.C. 代理人 Rabin & Berdo, P.C.
主权项 1. A packet synchronization switching method in a gateway device interconnecting first and second networks, which have different communication protocols, for synchronously performing system switching between a plurality of redundantly structured electronic circuit boards to output a sequence of packets, the electronic circuit boards including two circuit boards that are respectively in an operational state and a backup state at a time, the gateway device receiving data provided from the first network and, after performing data processing, outputting data to the second network, the method comprising: sharing a reference timing of the data processing, and time information, in the gateway device; performing the data processing in synchronization with the reference timing and packetizing an output of the data processing to provide packets in synchronization among the redundantly structured electronic circuit boards; sending an instruction to a first circuit board among the redundantly structured electronic circuit boards to perform synchronization with a second circuit board among the redundantly structured electronic circuit boards, at which time the first and second circuit boards are respectively in the operational state and the backup state; performing by the first circuit board and the second circuit board the synchronization between the first circuit board and the second circuit board according to the instruction, and then sending a notification of the completion of the synchronization; executing the system switching between the redundantly structured electronic circuit boards in accordance with the time information after the completion of the synchronization, the first and second circuit boards being respectively in the backup state and the operational state after the execution of the system switching; and for a predetermined period after the execution of the system switching, transferring any packet received by the first circuit board in the backup state to the second circuit board in the operational state to thereby prevent packet loss, the period being in accordance with an arrival delay of the packet during the transferring of the packet from the first circuit board to the second circuit board.
地址 Tokyo JP