| 摘要 |
In an improved construction of a memory device, the memory device includes a first group of pins via which a command/address signals are received and via which data signals are received, and a second group of pins via which the command/address signals are received and via which data signals are output. When the data signals are input to the first group of pins, the command/address signals are received via the second group of pins. When the data signals are output from the second group of pins, the command/address signals are received via the first group of pins.
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