发明名称 |
DELAY DETECTION DEVICE AND ITS METHOD |
摘要 |
PROBLEM TO BE SOLVED: To prevent a circuit scale from being expanded even if the number of input terminals is increased in a delay detection device provided with a shift register successively delaying input digital data by a clock input and a data operating part operating an output of the shift register and the input digital data. SOLUTION: A data multiplexing part 102 performs time division multiplexing of the data of input digital data terminals 101 consisting of N systems, the multipelxed data are inputted to a shift register 103 having N-stage registers needed to delay the data, and the data stored in the register are successively shifted to the next register to be delayed by inputting a clock to the register 103 from a clock input terminal 104. Only one data operating part 105 can perform delay detection in such a manner that the part 105 operates output data from the part 102 and the output data from the register 103. |
申请公布号 |
JP2001245012(A) |
申请公布日期 |
2001.09.07 |
申请号 |
JP20000055738 |
申请日期 |
2000.03.01 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
NARITA TAKANORI;TAKADA MIGAKU;KIRYU RYUSUKE;MATSUMOTO ATSUSHI |
分类号 |
H04L27/227;H04J3/04;H04L27/22 |
主分类号 |
H04L27/227 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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