发明名称 NONVOLATILE SEMICONDUCTOR MEMORY
摘要 <p>PURPOSE:To read at a high speed without adverse influence on an erasing operation having a verifying function by detecting the potential of a dummy transistor by a differential amplifier in a normal reading operation, and detecting a reading operation in a verifying operation at the time of erasing by a current sense type sense amplifier. CONSTITUTION:A normal reading operation is performed by applying voltage outputs of current/voltage converters 51, 52 to a differential amplifier 53, and applying the output of the amplifier 53 to an input/output buffer 10. In this case, even if a potential difference of the voltage outputs of the converters 51, 52 is about 100mV, it is immediately amplified to 'H', 'L' level. On the other hand, the amplifier 53 is nonactivated by a verifying operation at the time of erasing, and the output of the converter 51 is applied to an erasure controller 7 through an amplifier 54. Thus, the normal reading operation is accelerated, and the verifying operation at the time of erasing is accurately conducted.</p>
申请公布号 JPH04159694(A) 申请公布日期 1992.06.02
申请号 JP19900285444 申请日期 1990.10.22
申请人 MITSUBISHI ELECTRIC CORP 发明人 TERADA YASUSHI;MIYAWAKI YOSHIKAZU;NAKAYAMA TAKESHI;KOBAYASHI SHINICHI;HAYASHIGOE MASANORI
分类号 G11C17/00;G11C16/06;H01L21/8247;H01L27/10;H01L29/788;H01L29/792 主分类号 G11C17/00
代理机构 代理人
主权项
地址