发明名称 |
Clock recovery for optical transmission systems |
摘要 |
A receiver for an optical communications system which corrects distortion of a received signal. A clock recovery system utilizing a feedback and feedforward system are provided. The feedback loop comprises a phase detector and a clock source, while the feedforward loop comprises the phase detector and a delay element for delaying the output of distortion correction system. The feedback loop has a significantly lower bandwidth than the feedforward path. There are also provided methods of optimizing tap weights and of acquiring initial tap weights. |
申请公布号 |
US9419726(B2) |
申请公布日期 |
2016.08.16 |
申请号 |
US201013322938 |
申请日期 |
2010.07.16 |
申请人 |
Cisco Technology, Inc. |
发明人 |
Fludger Christopher |
分类号 |
H04B10/06;H04B10/61;H04L25/03 |
主分类号 |
H04B10/06 |
代理机构 |
Edell, Shapiro & Finnan, LLC |
代理人 |
Edell, Shapiro & Finnan, LLC |
主权项 |
1. A receiver for receiving at least one input signal from a photodiode in an optical communications system, comprising a feedback path, a feedforward path, and a tap weight centralization system,
the feedback path comprising:
an analog-to-digital converter (ADC) configured to digitize the at least one input signal and output a digital signal;a Finite Impulse Response (FIR) filter to process the digital signal and output a processed signal;a phase detector configured to detect a timing phase of the processed signal and output a signal indicative of the timing phase; anda clock source configured to provide a sampling clock signal to the ADC, the clock source receiving as input the signal indicative of the timing phase of the processed signal to control the sampling clock signal; the feedforward path comprising:
the phase detector; anda delay element configured to delay the processed signal and output a delayed processed signal, the delay of the delay element being controlled by the output of the phase detector; and the tap weight centralization system comprising:
a tap weight phase detector to monitor tap weights of the FIR filter and generate a correction signal indicative of a tap weight center offset; andat least one adder to add the correction signal to the signal output by the phase detector that is indicative of the timing phase. |
地址 |
San Jose CA US |