| 摘要 |
PURPOSE:To prevent the malfunction of each circuit and to enable a high- accuracy demodulating operation by outputting a lock-up signal together with a demodulated signal when a phase lock loop is synchronized with a transmitted signal and a demodulating means executes the normal operation during the prescribed period. CONSTITUTION:A receiving means 10 is provided to receive a transmitted signal DIN and to generate a first clock according to timing for switching a bit, and a phase lock loop 13 is provided to compare the phase of the first clock DCK with that of the second clock oscillated by a voltage controlled oscillator and to control the oscillation frequency of the voltage controlled oscillator corresponding to phase difference. In the state of locking the phase lock loop 13 to generate the reference clock BCK, when no error is generated at a data demodulation circuit 11 while a sub code detection circuit 14 synthesizes sub code data SBC having the prescribed number of bits, a lock-up signal LUP is outputted together so as to show that the operation of each circuit is normal and that an audio signal ADS and the sub code data SBC are correct. |
