发明名称 |
Input buffer circuit with differential input thresholds operable with high common mode input voltages |
摘要 |
An electrical input buffer circuit is provided for receiving an input signal such as an electronic spark timing signal and providing an output signal despite the presence of noise. The input buffer circuit receives a control signal and a reference voltage signal, and the voltage potential therebetween provides a differential input. A voltage divider network is coupled between the inputs for producing a first voltage potential and a second voltage potential in response to the differential input. A differential pair of NPN type transistors compares the control signal to a threshold value. The input buffer circuit produces an output high or low signal as a function of the input control voltage and is allowed to operate above and below local ground.
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申请公布号 |
US5910737(A) |
申请公布日期 |
1999.06.08 |
申请号 |
US19970885036 |
申请日期 |
1997.06.30 |
申请人 |
DELCO ELECTRONICS CORPORATION |
发明人 |
KESLER, SCOTT BIRK |
分类号 |
H04N7/14;(IPC1-7):H03K5/153;H03K5/159 |
主分类号 |
H04N7/14 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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