发明名称 |
Static ram circuit for defect analysis |
摘要 |
<p>Small feature CMOS defect analysis of SRAM circuits is made less time consuming with the inclusion of an in-circuit test connection which is brought to external contact pads (FB,FB*). External measurement and circuit forcing are accomplished via the external contact pads. A fault library for comparision to automated test results provides faster resolution of process defects. <IMAGE></p> |
申请公布号 |
EP0953989(A2) |
申请公布日期 |
1999.11.03 |
申请号 |
EP19990303428 |
申请日期 |
1999.04.29 |
申请人 |
AGILENT TECHNOLOGIES, INC. (A DELAWARE CORPORATION) |
发明人 |
WANG, JONATHAN;VOOK, DIETRICH W. |
分类号 |
G11C11/413;G01R31/28;G06F11/25;G11C29/04;G11C29/48;G11C29/50;(IPC1-7):G11C29/00 |
主分类号 |
G11C11/413 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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