| 摘要 |
PURPOSE:To prevent mixture of different brazing materials by providing a region for repelling the brazing materials on a metallized layer between a transistor chip and a capacitor chip. CONSTITUTION:Insulating layers 5 are formed on both ends of a beryllia board 1, metallized layers 6 for terminals are formed on the layers 5, and a metal layer 2 for repelling a brazing material is provided on a region except both the ends. Element placing metallized layers 3, 4 are formed on predetermined regions on the layer 2. The layers 3, 4 are disposed between a transistor chip TR and a capacitor chip C. Even if the materials are fed on the layers 3a-3d at the time of placing the chips TR, C, the materials are repelled by the layer 2 on a groove region 10. Thus, the materials are not introduced over the region 10 to the adjacent layers 3a-3d, and not mixed therewith. |
