| 摘要 |
<p>PURPOSE:To provide a microprocessor including a cache memory so as to shorten the cache replacement end queuing time of uncontinued data at the time of generating a mishit and improve the hit rate of continued data. CONSTITUTION:In the microprocessor including a cache unit 1 having a cache memory in its inside and an instruction executing unit 2, the unit 1 is provided with a bus cycle control circuit having a function for starting the bus cycles of the chache memory and a prescribed external device, a counting circuit for counting up and storing the frequency of the bus cycles, a register for specifying and storing the frequency of bus cycles based upon a prescribed program, and a comparator for mutually comparing values stored in the counting circuit and the register and detecting and outputting coincidence/discrepancy and constituted so that a bus cycle required for cache replacement is repeatedly started through the function of the bus cycle control circuit until coincidence is detected.</p> |
