发明名称 CMOS INTEGRATED CIRCUIT
摘要 <p>A super large scale integration which has a CMOS structure and can operate at a high speed regardless of the wiring capacitance of the circuit and the input capacitances of gates. The integration is constituted in such a way that a transmission-side gate (11) is constituted of a current output type gate and a capacitor (54) is charged and discharged only during the transition period of signals. On addition, the current of the capacitor (54) is made to flow to a conducting path (15) after the current is doubled by means of current mirror circuits (55 and 56). A reception-side gate (31) is constituted of a low-input impedance current inputting type gate. The gate (31) short-circuits the input and output terminals of a CMOS inverter (35) to each other and both the power source connecting terminals are respectively connected to positive and negative power terminals (16 and 17) through p-channel MOSFET current mirror circuits (37 and 39) and n-channel MOSFET current mirror circuits (38 and 41). The output sides of the current mirror circuits (37, 39, 38 and 41) are connected to the conducting path (15).</p>
申请公布号 WO1998038739(P1) 申请公布日期 1998.09.03
申请号 JP1998000775 申请日期 1998.02.26
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