Apparatus and method emulating a parallel interface to effect parallel data transfer from serial flash memory

摘要

Apparatus and method emulating a parallel interface to effect parallel data transfer from serial flash memory are provided. A field-programmable gate array (FPGA) may be coupled to a processor via a data bus. A serial flash memory may be coupled to the FPGA via a serial interface. The FPGA may be programmed to emulate a parallel interface by converting a serial data stream of boot code or operating software received from the serial flash memory to a parallel data stream to effect parallel data transfer over the data bus to the processor. The FPGA may be responsive to respective logic signals set by the processor to start access to the serial flash memory by pointing to at least one predefined location corresponding to at least one starting address of data to be transferred to the processor without using a plurality of address lines to access the serial flash memory.

主权项

1. Apparatus comprising:
a processor; a field-programmable gate array (FPGA) coupled to the processor by way of a data bus; and a serial flash memory coupled to the FPGA by way of a serial interface, wherein the FPGA is programmed to emulate a parallel interface by converting a serial data stream comprising boot code or operating software received from the serial flash memory to a parallel data stream to effect parallel data transfer over the data bus to the processor; and the FPGA to provide flow control to data being requested by the processor by monitoring a storage level of a data buffer coupled to receive the data being accessed from the serial flash memory.