发明名称 DRAM with dynamic memory cell field
摘要 The memory cell field includes numerous read-out buffers each one corresponding coupled to a pair of read-write lines with a similar layout for several write buffers. For each read-out and write buffer is provided a first read-out and write line respectively. To the first read-out lines is coupled a read-out register, and a write register is coupled to the first write lines. Between the read-out register and a static memory cell field is incorporated a second write line for transmission of a data value from the register. A second read-out line is incorporated between the static memory cell field and the write register for transmission of a data value.
申请公布号 DE19748502(A1) 申请公布日期 1998.09.03
申请号 DE19971048502 申请日期 1997.11.03
申请人 MITSUBISHI DENKI K.K., TOKIO/TOKYO, JP 发明人 INOUE, KAZUNARI, TOKIO/TOKYO, JP;ABE, HIDEAKI, TOKIO/TOKYO, JP
分类号 G11C11/409;G11C7/10;G11C11/401;(IPC1-7):G11C11/409 主分类号 G11C11/409
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