Dram cell with trench capacitor and buried lateral contact.

摘要

A DRAM cell with a trench capacitor having a first plate (22,24) formed as a diffusion on the outside surface of a trench and a second plate (field plate 28) formed inside the trench is fabricated. The transfer transistor is in a self-aligned moat area that slightly overlaps the capacitor area and allows for increased misalignment tolerance. The field plate is used as implantation mask for the moat region. It has sloped sidewalls to avoid the formation of conductive filaments from subsequent conductive layers. The bitline contact is self-aligned. In another embodiment, a planar capacitor is used. In a third embodiment two conductive plates are formed inside a trench. A sidewall insulator technique using two selectively etchable materials is used to provide a less destructive fabrication technique for forming sidewall insulating layers and allowing the use of gate insulator layer to protect the surface of the substrate during the formation of the sidewall insulating layers.