发明名称 |
Microcomputer with packet translation for event packets and memory access packets |
摘要 |
<p>A chip (11) with an address and data path (15) interconnecting at least one CPU (12) with another module (14) and an external communication port (30), the CPU generating event packets and memory access packets and the module (14) generating event packets, the packets being distributed in parallel format on the path 15 and the external communication port (30) including circuitry to reduce the parallel format of each packet to a more serial format for off-chip communication. <IMAGE></p> |
申请公布号 |
EP0953915(A1) |
申请公布日期 |
1999.11.03 |
申请号 |
EP19990303254 |
申请日期 |
1999.04.27 |
申请人 |
STMICROELECTRONICS LIMITED |
发明人 |
JONES, ANDREW MICHAEL;MAY, MICHAEL DAVID |
分类号 |
G06F13/38;(IPC1-7):G06F13/38 |
主分类号 |
G06F13/38 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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