Josephson magnetic random access memory with an inductive-shunt

摘要

A memory system includes a word-line coupled to memory cells in a row, and a bit-line coupled to memory cells in a column. Each of the memory cells includes a memory storage element including a Josephson junction configured to be in either a first state or a second state in response to an application of a word-line current to the Josephson junction. A read operation is performed on the at least one memory storage element by an application of a bit-line current to the bit-line. At least one inductive-shunt, coupled in parallel to the at least one memory storage element, is configured to, after the read operation, remove at least a substantial portion of the bit-line current provided to the at least one memory storage element without requiring removal of an entirety of the bit-line current applied to the bit-line during the read operation.

主权项

1. A memory system comprising:
an array of memory cells arranged in rows and columns; a first set of word-lines, wherein each of the first set of the word-lines is coupled to a first plurality of memory cells in at least one row; a first set of bit-lines, wherein each of the first set of the bit-lines is coupled to a second plurality of memory cells in at least one column; wherein each of the first plurality of the memory cells and each of the second plurality of the memory cells comprises:
at least one memory storage element comprising at least one Josephson junction configured to be in either a first state or a second state in response to an application of a word-line current, via the at least one of the first set of the word-lines, to the at least one Josephson junction, and wherein a read operation on the at least one memory storage element is performed in response to an application of a bit-line current to the at least one of the first set of the bit-lines; and at least one inductive-shunt coupled in parallel to the at least one memory storage element, wherein the inductive-shunt is configured to after the read operation, remove at least a substantial portion of the bit-line current provided to the at least one memory storage element without requiring removal of an entirety of the bit-line current applied to the at least one of the first set of the bit-lines during the read operation.