| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor memory which can analyze easily a defective state when defect is caused at testing of a memory. SOLUTION: This semiconductor memory is provided with a memory array, a control circuit controlling operation of this memory array, and an power-off signal generating circuit in which an auto-power-off type memory operated conforming to a power-off signal restricting a period in which access for the memory array is activated is incorporated, which generates a power-off signal at the normal operation and an power-off signal at the test operation where a period of an enable-state is longer than that of the power-off signal at the normal operation, and which switches a power-off signal at the normal operation or a power-off signal at the test operation and output it.
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