发明名称 |
Semiconductor electronic components with integrated current limiters |
摘要 |
An electronic component includes a high-voltage depletion-mode transistor and a low-voltage enhancement-mode transistor. A source electrode of the high-voltage depletion-mode transistor is electrically connected to a drain electrode of the low-voltage enhancement-mode transistor, and a gate electrode of the high-voltage depletion-mode transistor is electrically coupled to the source electrode of the low-voltage enhancement-mode transistor. The on-resistance of the enhancement-mode transistor is less than the on-resistance of the depletion-mode transistor, and the maximum current level of the enhancement-mode transistor is smaller than the maximum current level of the depletion-mode transistor. |
申请公布号 |
US9443849(B2) |
申请公布日期 |
2016.09.13 |
申请号 |
US201514920760 |
申请日期 |
2015.10.22 |
申请人 |
Transphorm Inc. |
发明人 |
Wu Yifeng;Mishra Umesh;Chowdhury Srabanti |
分类号 |
H01L27/12;H01L27/088;H01L29/778;H01L27/06;H01L29/20;H01L29/16;H03K17/687 |
主分类号 |
H01L27/12 |
代理机构 |
Fish & Richardson P.C. |
代理人 |
Fish & Richardson P.C. |
主权项 |
1. An electronic component, comprising:
a depletion-mode transistor having a first breakdown voltage and a first maximum current level, the depletion-mode transistor comprising a source electrode, a gate electrode, a drain electrode, a semiconductor material layer, and a channel in the semiconductor material layer; and an enhancement-mode transistor having a second breakdown voltage and a second maximum current level, the enhancement-mode transistor comprising a source electrode, a gate electrode, and a drain electrode; wherein the source electrode of the depletion-mode transistor is electrically connected to the drain electrode of the enhancement-mode transistor and the gate electrode of the depletion-mode transistor is electrically coupled to the source electrode of the enhancement-mode transistor; a conductivity or charge density of the channel is smaller in a gate region of the depletion-mode transistor than in an access region of the depletion-mode transistor when 0V is applied to the gate electrode of the depletion-mode transistor relative to the source electrode of the depletion-mode transistor; and the first maximum current level is smaller than the second maximum current level. |
地址 |
Goleta CA US |