| 摘要 |
PURPOSE:To recover a clock stably by recovering the clock based on a data of channels I and Q after identification. CONSTITUTION:A detection input of a channel inputted to an identifier 1 is subjected to level identification in the timing of a sampling clock inputted from a voltage controlled oscillator 4. An error signal epsilon1i outputted from the identifier 1 is given to a time holding circuit 14, where the signal is subjected to time matching of the timing T0 at the present point of time and the result is inputted to a D flip-flop 10 via an exclusive OR circuit 15. A voltage controlled oscillator 4 generates a clock having a frequency in response to a difference signal from the said D flip-flop 10. Thus, a sampling clock is generated in the timing to be an optimum position of a high pattern and the sampling clock is inputted to the identifier 1. |
