发明名称 PHASE ERROR COMPENSATION CIRCUIT
摘要 A method and system of compensating for phase error. A phase error compensation circuit is configured to generate a phase-corrected quadrature Q output signal and a corresponding phase-corrected in-phase I output signal, the circuit includes a first transconductance circuit configured to convert a voltage signal related to an I input voltage signal to an I current signal. A second transconductance circuit is configured to convert a voltage signal related to a Q input signal to a Q current signal. A first multiplier circuit is configured to multiply the Q current signal times a Q scaling constant. A second multiplier circuit is configured to multiply the I current signal times an I scaling constant. An I summer sums the I current signal with the scaled Q signal. A Q summer sums the Q current signal with the scaled I signal.
申请公布号 US2016301388(A1) 申请公布日期 2016.10.13
申请号 US201514806478 申请日期 2015.07.22
申请人 Linear Techology Corporation 发明人 Myers John Perry
分类号 H03H11/18;H03K5/26;H03H11/22;H03K5/02 主分类号 H03H11/18
代理机构 代理人
主权项 1. A phase error compensation circuit comprising: a first transconductance circuit having a differential input and a differential output; a second transconductance circuit having a differential input and a differential output; a first multiplier circuit comprising: a differential control input (VCI);a second differential input coupled to the differential output of the first transconductance circuit; anda differential output; a second multiplier circuit comprising: a differential control input (VCQ);a second differential input coupled to the differential output of the second transconductance circuit; anda differential output; a first differential load comprising a first load and a second load, together having a differential input coupled to the differential output of the second multiplier circuit and sharing a common node; and a second differential load comprising a first load and a second load together having a differential input coupled to the differential output of the first multiplier circuit and sharing the common node, wherein the first multiplier circuit is configured to multiply the differential current signal provided by the first transconductance circuit times a first scaling constant provided at the differential control input of the first multiplier circuit.
地址 Milpitas CA US