发明名称 MEMORY CONTROL SYSTEM
摘要 PURPOSE:To achieve the assignment of an address and a memory control rationally without excess or deficiency for the memory mixed with memory boards with different capacity, by giving number serially to each memory board through addresses. CONSTITUTION:Numbering is given to each memory board through addresses, and real address accessing is made to a board A where the real address is coincident with the address used for the board. To rest boards B, a positive number subtracting the address of the board A from the real address is taken as the address, and the upper rank bit obtained through subtraction is compared with a set indicating the sequence of a board in the boards B, the board coincident is selected and accessed. As to the boards B, for example, the number of boards A is set with a data setting rotary switch 10, and the address of the board B is set. Next, the upper rank bit is compared with a comparator 14, the order of the board is set and accessing is made by a NAND gate group 16.
申请公布号 JPS57105876(A) 申请公布日期 1982.07.01
申请号 JP19800183077 申请日期 1980.12.24
申请人 FUJITSU KK 发明人 SHIBATA TOMOHITO;KISHINO TAKUMI;KOBAYASHI MASAAKI;HASHIMOTO SHIGERU
分类号 G06F12/06;G11C8/12 主分类号 G06F12/06
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