| 摘要 |
<p>PROBLEM TO BE SOLVED: To obtain the internal clock generating device which generates a clock having a small difference between the period of a clock and the delay time of a combinational circuit. SOLUTION: The combinational circuit included in a circuit supplied with a clock includes five signal processing parts which possibly become a critical path. Dummy signal processing parts D1' to D5' are a circuit corresponding to the respective signal processing parts. A clock is generated which includes the maximum value of delay between the input and output of the dummy signal processing parts D1' to D5' in a period. Therefore, even when the critical path of a circuit which inputs the clock changes and the delay time of the combinational circuit increases or decreases, the period of the clock increases or decreases with it, so the difference between the period of the clock and the delay time of the combinational circuit is reduced, so that the operation of the circuit becomes fast.</p> |
