发明名称 WAFER TEST EQUIPMENT
摘要 PURPOSE:To eliminate a loss time and improve an operation rate by a method wherein stages which are transferred reciprocally between the first alignment unit and a probe card and the second alignment unit and the probe card are respectively provided and those stages are transferred alternately. CONSTITUTION:The first wafer is transferred from a cassette 11 through the first guide 121 and put on the first stage 161 and positioned. The first stage 161 is transferred along a rail 15 to the position directly under a probe card 14. The probe card 14 is contacted with respective chips on the wafer to test the electrical characteristics of the chips. During this process, the second wafer is put on the second stage 162 through the second guide 122 and positioned and kept waiting. After the test of the wafer on the first stage 161 is finished, that wafer is stored in a receiving cassette and at the same time the second stage 162 is transferred to the position directly under the probe card 14 and the respective chips on the wafer on the second stage 162 are tested.
申请公布号 JPS61220349(A) 申请公布日期 1986.09.30
申请号 JP19850061504 申请日期 1985.03.26
申请人 TOSHIBA CORP 发明人 HOASHI YUKIKAZU
分类号 H01L21/677;H01L21/66;H01L21/67 主分类号 H01L21/677
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