| 摘要 |
PROBLEM TO BE SOLVED: To provide an information transmission system for transferring information by a simple circuit and a few signal lines. SOLUTION: A first frequency-dividing part 102 frequency-divides a clock signal CLK into a frequency-division rate 2X obtained by doubling information to be transmitted. A second frequency-dividing part 103 frequency-divides the clock signal CLK inverted by an inverting circuit 101 into a frequency-division rate 2Y obtained by doubling information to be transmitted. Each output signal from the first and second frequency-dividing parts 102 and 103 is synthesized by a signal synthesizing part 108 so that an exclusive logical sum can be obtained, and transmitted to a frequency division rate detecting part 111. The frequency-division rate detecting part 111 measures an interval in which the output signal of the signal synthesizing part 108 is changing at the rising point of the clock signal CLK and an interval in which the output signal of the single synthesizing part 108 is changing at the falling point of the clock signal CLK. Thus, the values set by the first and second frequency-dividing parts 102 and 103 can be read through a data signal line by an information receiving part 11.
|
