发明名称 |
Semiconductor process |
摘要 |
A semiconductor process is described. A semiconductor substrate having a memory area, a first device area and a second device area is provided. A patterned charge-trapping layer is formed on the substrate, covering the memory area and the second device area but exposing the first device area. A first gate oxide layer is formed in the first device area. The charge-trapping layer in the second device area is removed. A second gate oxide layer is formed in the second device area. |
申请公布号 |
US9362125(B2) |
申请公布日期 |
2016.06.07 |
申请号 |
US201414454332 |
申请日期 |
2014.08.07 |
申请人 |
United Microelectronics Corp. |
发明人 |
Chang Yuan-Hsiang;Chiu Yi-Shan;Chen Zhen;Ta Wei;Liu Wei-Chang |
分类号 |
H01L21/28;H01L29/66;H01L29/792;H01L27/115 |
主分类号 |
H01L21/28 |
代理机构 |
J.C. Patents |
代理人 |
J.C. Patents |
主权项 |
1. A semiconductor process, comprises:
providing a semiconductor substrate having a memory area, a first device area and a second device area; forming, over the semiconductor substrate, a patterned charge-trapping layer that covers the memory area and the second device area but exposes the first device area; forming a first gate oxide layer in the first device area; forming a first well in the semiconductor substrate in the second device area through the patterned charge-trapping layer in the second device area after the first gate oxide layer is formed; removing the charge-trapping layer in the second device area after the first well is formed; and forming a second gate oxide layer in the second device area. |
地址 |
Hsinchu TW |