发明名称 SOLID-STATE IMAGING DEVICE AND METHOD OF DRIVING SOLID-STATE IMAGING DEVICE
摘要 A solid-state imaging device includes a pixel including a photoelectric conversion element, an accumulation unit accumulating charges generated by the photoelectric conversion element, a reset unit resetting the accumulation unit at a voltage of equal to or more than 4.05 V, and an amplifier transistor amplifying and outputting a signal corresponding to amount of accumulated charges, a vertical output line connected to the pixel, a current source circuit including first to third transistors flowing a constant current through the vertical output line, and a voltage setting circuit respectively setting the gate voltages of the first to third transistors to a first voltage, a second voltage higher than the first voltage, and a third voltage higher than the second voltage and lower than the power supply voltage so as to set the drain-source voltage of each of the first to third transistors to equal to or less than 1.75 V.
申请公布号 US2016277695(A1) 申请公布日期 2016.09.22
申请号 US201615056527 申请日期 2016.02.29
申请人 CANON KABUSHIKI KAISHA 发明人 Oguro Yasuhiro;Yamazaki Kazuo;Sakai Seiichirou
分类号 H04N5/369;H04N5/372;H04N5/378;H04N5/357 主分类号 H04N5/369
代理机构 代理人
主权项 1. A solid-state imaging device comprising: a pixel including a photoelectric conversion element,an accumulation unit to which charges generated by the photoelectric conversion element are transferred,a reset unit configured to reset the accumulation unit at a power supply voltage of equal to or more than 4.05 V, andan amplifier transistor configured to amplify and output a signal corresponding to amount of charges accumulated in the accumulation unit; a vertical output line which is connected to the pixel and to which the signal amplified by the amplifier transistor is output; a current source circuit including a third transistor connected to the vertical output line, a second transistor connected in series with the third transistor, and a first transistor connected in series with the second transistor and configured to make a predetermined constant current flow through the vertical output line; and a voltage setting circuit configured to set a gate voltage of the first transistor to a first voltage, a gate voltage of the second transistor to a second voltage higher than the first voltage, and a gate voltage of the third transistor to a third voltage higher than the second voltage and lower than the power supply voltage so as to set a drain-source voltage of each of the first transistor, the second transistor, and the third transistor to equal to or less than 1.75 V.
地址 Tokyo JP