发明名称 SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To suppress the increase of a circuit for an inspection for inspecting a constitution circuit, to eliminate the need of special timing design considering the change of an operation timing by the circuit for the inspection and to improve the fault detection rate of a scanning path inspection by executing the scanning path inspection of a combinational circuit without providing an SFF circuit for the inspection between a functional macro circuit and the combinational circuit of the preceding stage. SOLUTION: This device is provided with the functional macro circuit 13M, the combinational circuit 12C of the preceding stage and also the plural SFF circuits 11F, 15F and 18F for forming a scanning path. Then, a selection circuit 17S for switching the output of the preceding stage combinational circuit 12C for inputting the output of the SFF circuit 11F on the preceding stage side of the functional macro circuit and the output of the other combinational circuit 1BC and outputting them to a prescribed sequential circuit 18F is provided.
申请公布号 JPH11101859(A) 申请公布日期 1999.04.13
申请号 JP19970264247 申请日期 1997.09.29
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 TAGUCHI SEIICHI
分类号 G01R31/28;G06F11/22 主分类号 G01R31/28
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