发明名称 Select gate transistor with single crystal silicon for three-dimensional memory
摘要 A fabrication process for a 3D memory structure provides a single crystal silicon channel for a drain-side select gate (SGD) transistor using a laser thermal anneal (LTA). The 3D memory structure includes a stack formed from an array of alternating conductive and dielectric layers. A NAND string is formed by filling a memory hole with memory films, including a charge trapping material, a tunnel oxide and a polysilicon channel. In one case, a separate oxide and polysilicon forms the SGD transistor gate oxide and channel respectively, where LTA is performed on the polysilicon. In another case, the same oxide and polysilicon are used for the SGD transistor and the memory cells. A portion of the polysilicon is converted to single crystal silicon. A back side of the single crystal silicon is subject to epitaxial growth and thermal oxidation via a void in a control gate layer.
申请公布号 US9397111(B1) 申请公布日期 2016.07.19
申请号 US201514927828 申请日期 2015.10.30
申请人 SanDisk Technologies LLC 发明人 Chowdhury Murshed;Zhang Yanli;Liu Jin;Makala Raghuveer S;Alsmeier Johann
分类号 H01L27/115;H01L21/02 主分类号 H01L27/115
代理机构 Vierra Magen Marcus LLP 代理人 Vierra Magen Marcus LLP
主权项 1. A method for fabricating a memory device, comprising: forming a stack comprising alternating control gate layers and dielectric layers, wherein the control gate layers comprise a control gate layer for a select gate transistor of a NAND string above control gate layers for memory cells of the NAND string; etching a memory hole in the stack; providing memory films along a wall of the memory hole adjacent to the control gate layers for the memory cells; providing polysilicon in the memory hole and converting the polysilicon to crystalline silicon using laser thermal annealing, wherein the crystalline silicon spans the control gate layer for the select gate transistor; and providing a metal in the control gate layer for the select gate transistor, wherein the crystalline silicon forms a channel of the select gate transistor, the metal provides a control gate of the select gate transistor and a gate oxide of the select gate transistor is provided between the metal and the crystalline silicon.
地址 Plano TX US