Metallization of solar cells with differentiated P-type and N-type region architectures

摘要

Methods of fabricating solar cell emitter regions with differentiated P-type and N-type regions architectures, and resulting solar cells, are described. In an example, a back contact solar cell can include a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is disposed on a first thin dielectric layer disposed on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is disposed on a second thin dielectric layer disposed on the back surface of the substrate. A third thin dielectric layer is disposed over an exposed outer portion of the first polycrystalline silicon emitter region and is disposed laterally directly between the first and second polycrystalline silicon emitter regions. A first conductive contact structure is disposed on the first polycrystalline silicon emitter region. A second conductive contact structure is disposed on the second polycrystalline silicon emitter region. Metallization methods, include etching techniques for forming a first and second conductive contact structure are also described.

主权项

1. A method of fabricating alternating N-type and P-type emitter regions of a solar cell, the method comprising:
forming a first silicon layer of a first conductivity type on a first thin dielectric layer formed on a back surface of a substrate; forming an insulating layer on the first silicon layer; patterning the insulating layer and the first silicon layer to form first silicon regions of the first conductivity type having an insulating cap thereon, wherein the patterning includes exposing an outer portion and a lateral portion of the first silicon regions; forming a second thin dielectric layer on the back surface of the substrate; forming a third thin dielectric layer on the exposed outer portion and lateral portion of the first silicon regions; forming a second silicon layer of a second, different, conductivity type on the third thin dielectric layer, on the second thin dielectric layer, and on the insulating cap of the first silicon regions; patterning the second silicon layer and insulating cap to form contact openings in regions of the second silicon layer and to expose portions of the first silicon regions; forming a metal layer over the back surface of a substrate; and patterning the metal layer and second silicon layer to form isolated second silicon regions of the second conductivity type and to form conductive contacts for the first silicon regions and the isolated second silicon regions, wherein the patterning includes etching the metal layer and the second silicon layer using same etchant.