发明名称 Memory array datapath architecture
摘要 A datapath structure (for use in conjunction with at least one memory array) that includes N local data lines, N global data lines, M global I/O lines, and a datapath. Each memory array is partitioned into a number of segments, and each segment is associated with one or more bit lines. Each segment is further associated with at least one local data line. Each local data line couples to the bit lines associated with that particular local data line. The N global data lines operatively couple to the N local data lines. The datapath interconnects the N global data lines to the M global I/O lines in accordance with a set of control signals. The datapath includes M local I/O lines, M multiplexer circuits, and M interface circuits. The M interface circuits interconnect the M global I/O lines and the M local I/O lines. Each of the M multiplexer circuits interconnects the M local I/O lines to N/M of the N global data lines. In a specific implementation, M is eight and N is sixty-four.
申请公布号 US6157560(A) 申请公布日期 2000.12.05
申请号 US19990236509 申请日期 1999.01.25
申请人 WINBOND ELECTRONICS CORPORATION 发明人 ZHENG, HUA
分类号 G11C7/10;G11C7/18;(IPC1-7):G11C5/06 主分类号 G11C7/10
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