| 发明名称 | Interconnect structure and method for forming the same | ||
| 摘要 | Interconnect structures and methods for forming the same are described. A method for forming an interconnect structure may include: forming a low-k dielectric layer over a substrate; forming an opening in the low-k dielectric layer; forming a conductor in the opening; forming a capping layer over the conductor; and forming an etch stop layer over the capping layer and the low-k dielectric layer, wherein the etch stop layer has a dielectric constant ranging from about 5.7 to about 6.8. | ||
| 申请公布号 | US9373581(B2) | 申请公布日期 | 2016.06.21 |
| 申请号 | US201514615264 | 申请日期 | 2015.02.05 |
| 申请人 | Taiwan Semiconductor Manufacturing Company, Ltd. | 发明人 | Shih Po-Cheng;Liou Joung-Wei;Sun Chih-Hung;Chou Chia-Cheng;Hsu Kuang-Yuan |
| 分类号 | H01L23/532;H01L21/768;H01L23/522 | 主分类号 | H01L23/532 |
| 代理机构 | Slater Matsil, LLP | 代理人 | Slater Matsil, LLP |
| 主权项 | 1. A method, comprising: forming a first etch stop layer and an adhesion layer over a substrate; forming a low-k dielectric layer over the first etch stop layer and the adhesion layer; forming an opening in the low-k dielectric layer; forming a conductor in the opening; forming a capping layer over the conductor; and forming a second etch stop layer over the capping layer and the low-k dielectric layer, wherein the second etch stop layer has a dielectric constant ranging from about 5.7 to about 6.8. | ||
| 地址 | Hsin-Chu TW | ||