发明名称 |
Semiconductor device including buried-gate MOS transistor with appropriate stress applied thereto |
摘要 |
According to one embodiment, a semiconductor device includes a semiconductor substrate having a trench and including an active area including a channel area formed along an inner surface of the trench and source/drain areas formed at both ends of the channel area and sandwiching the trench, a gate insulating film formed on the inner surface of the trench, and a gate electrode formed in the trench in which the gate insulating film is provided. A main surface of the semiconductor substrate has {100} plane orientation, a portion of the channel area parallel to a side surface of the trench has {110} channel plane orientation and has <100> channel orientation in a channel length direction, and tensile stress in the channel length direction and compressive stress in a channel width direction are applied to the portion of the channel area parallel to the side surface of the trench. |
申请公布号 |
US9515183(B2) |
申请公布日期 |
2016.12.06 |
申请号 |
US201514842998 |
申请日期 |
2015.09.02 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
Inaba Satoshi |
分类号 |
H01L29/423;H01L27/24;H01L21/28;H01L29/78;H01L29/417 |
主分类号 |
H01L29/423 |
代理机构 |
Holtz, Holtz & Volek PC |
代理人 |
Holtz, Holtz & Volek PC |
主权项 |
1. A semiconductor device comprising:
a semiconductor substrate having a trench and comprising an active area, the active area including a channel area formed along an inner surface of the trench and source/drain areas formed at both ends of the channel area and sandwiching the trench; a gate insulating film formed on the inner surface of the trench; and a gate electrode formed in the trench in which the gate insulating film is provided, wherein: a main surface of the semiconductor substrate has a plane orientation of {100}, a portion of the channel area parallel to a side surface of the trench has a channel plane orientation of {110} and has a channel orientation of <100> in a channel length direction, tensile stress in the channel length direction and compressive stress in a channel width direction are applied to the portion of the channel area parallel to the side surface of the trench, the semiconductor device further comprises an isolation area surrounding the active area, and the isolation area has tensile stress. |
地址 |
Tokyo JP |