发明名称 Semiconductor device
摘要 A memory cell (101) includes a memory transistor (10A) having channel length L1 and channel width W1, and a plurality of select transistors (10B) each electrically being connected in series with the memory transistor and independently having channel length L2 and channel width W2, wherein each of the memory transistor and the plurality of select transistors includes an active layer (7A) formed from a common oxide semiconductor film, the memory transistor is a transistor which is capable of being irreversibly changed from a semiconductor state where drain current Ids depends on gate voltage Vg to a resistor state where drain current Ids does not depend on gate voltage Vg, and channel length L2 is greater than channel length L1.
申请公布号 US9502133(B2) 申请公布日期 2016.11.22
申请号 US201415028240 申请日期 2014.09.02
申请人 Sharp Kabushiki Kaisha 发明人 Ueda Naoki;Katoh Sumio
分类号 G11C13/00;G11C17/16;G11C17/18;H01L29/10;H01L29/24;H01L29/786;H01L29/423;H01L27/112 主分类号 G11C13/00
代理机构 Keating & Bennett, LLP 代理人 Keating & Bennett, LLP
主权项 1. A semiconductor device comprising at least one memory cell, the at least one memory cell including a memory transistor having a first channel length L1 and a first channel width W1, and a plurality of select transistors, each of the plurality of select transistors electrically being connected in series with the memory transistor and independently having a second channel length L2 and a second channel width W2, wherein each of the memory transistor and the plurality of selection transistors includes an active layer formed from a common oxide semiconductor film, the memory transistor is a transistor which is capable of being irreversibly changed from a semiconductor state where a drain current Ids depends on a gate voltage Vg to a resistor state where the drain current Ids does not depend on the gate voltage Vg, and the second channel length L2 is greater than the first channel length L1.
地址 Osaka JP