发明名称 MOSFET analog multiplier
摘要 A MOSFET analog multiplier with a variable resistive MOSFET linear means for linearly varying output current I depending upon a symmetrical input voltage from voltage sources V2 and -V2 and an input voltage from an input voltage source V1 operatively associated with the symmetrical input voltage from the voltage source V2 and -V2, with the variable resistive MOSFET linear means having a node A to output the varied output current I therethrough is disclosed. An operational amplifying unit for amplifying the linearly varied output current I and which includes an operational amplifier U with an inverting input terminal connected to the node A of the MOSFET linear means, a non-inverting input terminal connected to ground, and an output terminal. The operational amplifying unit further includes a feedback element Z connected between the inverting input terminal and the output terminal of the operational amplifier U, where in use the output terminal outputs a voltage Vo.
申请公布号 US5254889(A) 申请公布日期 1993.10.19
申请号 US19920900331 申请日期 1992.06.18
申请人 KOREA TELECOMMUNICATION AUTHORITY 发明人 HAN, IL S.
分类号 G06G7/163;G06N3/063;H03F3/16;(IPC1-7):G06G7/16 主分类号 G06G7/163
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