| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To specify the position of damage caused during assembling process operation and then to speedily alter and improve a semiconductor device and, especially, to make the most of the modification and improvement when designing the process, material, and structure of a multi-chip package. <P>SOLUTION: A TEG device for assembly resistance evaluation is equipped with a plurality of sensor TEGs capable of measuring a load placed in the assembling process of the semiconductor device as electric characteristic values, and is characterized in that the plurality of sensor TEGs are arranged in three dimensions. <P>COPYRIGHT: (C)2009,JPO&INPIT</p> |
