发明名称 Pll circuit with masked phase error signal
摘要 <p>In a PLL circuit having a phase comparator for detecting a phase difference between a reference signal having a predetermined frequency or a reproduction signal having signal change points at irregular time intervals and a signal to be compared and outputting a phase error signal, a mask circuit controls to transmit or block at least part or all of the phase error signal in accordance with the reference signal or the reproduction signal, an output different from the phase error signal from the phase comparator, and the signal to be compared. &lt;IMAGE&gt;</p>
申请公布号 EP0899883(A1) 申请公布日期 1999.03.03
申请号 EP19980116034 申请日期 1998.08.25
申请人 NEC CORPORATION 发明人 NOGAWA, HIROMICHI
分类号 G11B20/14;H03L7/089;H03L7/14;(IPC1-7):H03L7/00;H03L7/10 主分类号 G11B20/14
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