发明名称 |
Techniques and system for managing activity in multicomponent platform |
摘要 |
In one embodiment an apparatus includes a multiplicity of processor components; one or more device components communicatively coupled to one or more processor components of the multiplicity of processor components; and a controller comprising logic at least a portion of which is in hardware, the logic to schedule one or more forced idle periods interspersed with one or more active periods, a forced idle period spanning a duration during which the multiplicity of processor components and the one or more device components are simultaneously placed in respective idle states that define a forced idle power state during isolated sub-periods of the forced idle period. Other embodiments are disclosed and claimed. |
申请公布号 |
US9442558(B2) |
申请公布日期 |
2016.09.13 |
申请号 |
US201314129950 |
申请日期 |
2013.06.28 |
申请人 |
INTEL CORPORATION |
发明人 |
Diefenbaugh Paul S.;Gorbatov Eugene;Henroid Andrew;Samson Eric C.;Cooper Barnes |
分类号 |
G06F1/32;G06F9/48 |
主分类号 |
G06F1/32 |
代理机构 |
|
代理人 |
|
主权项 |
1. An apparatus for power management, comprising:
a multiplicity of processor components; one or more device components communicatively coupled to one or more processor components of the multiplicity of processor components; and a controller comprising logic at least a portion of which is in hardware, the logic to schedule one or more forced idle periods interspersed with one or more active periods, a forced idle period spanning a duration during which one or more of the multiplicity of processor components and one or more device components are simultaneously placed in idle states that define a forced idle power state during isolated sub-periods of the forced idle period. |
地址 |
Santa Clara CA US |