| 摘要 |
PURPOSE: To provide the DMA transfer control circuit which can transfer even a small amount and a relatively large amount of data, arranged between scattered addresses of a large-scale semiconductor test instrument, fast by DMA. CONSTITUTION: In addition to the constitution of a DMA transfer control circuit obtained by normal conventional technology, an ADDER-1.5 as an adder which can add an optional value and an REG1.7 as a register which holds addition data for the addition by the ADDER1.5 are provided by connecting to an ADC1.3 as a transfer source address counter. Similarly, an ADDER2.6 as an adder and an REG2.8 as a register are provided by being connected to an ADC2.4 as a transfer destination address counter, thereby constituting the DMA transfer control circuit A13. |
