发明名称 Method for manufacturing dual gate oxide layer
摘要 A method for forming a dual gate oxide layer, which can be suitably applied to the surface of a shallow trench isolation structure, comprising the steps of providing a substrate that has a device isolation structure already formed thereon such as a shallow trench isolation. Next, a thermal oxidation process is carried out to form an oxide layer over the substrate and the isolation structure. A silicon nitride layer is then deposited on top of the oxide layer. In the subsequent step, the silicon nitride layer is patterned to cover portions of the oxide layer that lies in an input/output area. The method of this invention produces a better quality gate oxide layer over the device isolation structure and the substrate surface. Therefore, device problems caused by the deposition of a poor quality gate oxide in a conventional method can be greatly reduced.
申请公布号 US5985725(A) 申请公布日期 1999.11.16
申请号 US19970997449 申请日期 1997.12.23
申请人 UNITED MICROELECTRONICS CORP. 发明人 CHOU, JIH-WEN
分类号 H01L21/311;H01L21/314;(IPC1-7):H01L21/336;H01L21/31;H01L21/469 主分类号 H01L21/311
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