| 摘要 |
A device and method for sensing the status of a non-volatile magnetic latch. A cross-coupled inverter pair latch cell is employed for the data sensing. During the "Sense' cycles, the inputs to the latch cell are from spin dependent tunneling effect devices, each located in its respective inverter pair. The SDT magneto-resistive storage devices have complimentary resistance states written into them. A switch, connected to the inverter pairs, is used to reset and initiate a regenerative sequence. Whenever the switch is turned on (reset) and off (regenerate), the latch cell will sense a potential imbalance generated by the magneto-resistive storage devices with complimentary resistance. During regeneration, the imbalance will be amplified and eventually the inverter pairs will reach a logic high or logic low state. The latch can be used as a memory circuit, however, upon loss of power the memory is retained. The state of the circuit is retained inside of SDT components. On-chip current lines are used to control the states of the components.
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