发明名称 |
Circuit for synchronous rectification with minimal reverse recovery losses |
摘要 |
A circuit for synchronous rectification including two power MOSFET transistor switches in which the bottom switch is a P channel MOSFET, rather than an N channel MOSFET. The circuit of the present invention uses a single channel driver, rather than a dual driver and eliminates the deadtime associated with conventional circuits, thus minimizing reverse recovery losses. In an alternative arrangement, the position of the output filter is switched so that the N channel MOSFET conducts during the freewheeling time and the P channel MOSFET (with a larger RDSON) conducts during the conductor charge cycle.
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申请公布号 |
US6396333(B2) |
申请公布日期 |
2002.05.28 |
申请号 |
US20010753599 |
申请日期 |
2001.01.04 |
申请人 |
INTERNATIONAL RECTIFIER CORPORATION |
发明人 |
DUBHASHI AJIT;PELLY BRIAN |
分类号 |
G05F1/613;(IPC1-7):G05F3/02 |
主分类号 |
G05F1/613 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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